In the context of virtual commissioning and remote control techniques, rapid test methods called Hardware-In-the-Loop (HIL) have existed for many years. They are techniques that allow reproducing manufacturing products and electronic control units (ECU) with the most diverse operating conditions. HIL allows you to test products and control unit by reproducing virtual malfunctions, extreme conditions and test the reliability of whole products or components. HIL systems reproduce in a more or less complete way the physical electrical and electronic signal of the system for which they are intended and are an extremely effective tool for improving the flexibility and reusability of industrial product validation systems.
Twin in the Loop is a new and further step forward on the HIL concept made by our company IRS with a proven experience in embedded digital twin.
The Twin In the Loop can be described by the combination the Hardware In the Loop and the Digital Twin. The Digital Twin define the hardware signals thanks to numerical models or models derived from real data, through machine-learning techniques, neural networks and AI.
In particular simulated hardware signals are modeled and applied to industrial testing using generative adversarial network (GAN).
A concept similar to Twin in the Loop but different is TiLA (Twin in the Loop Architecture) where the loop is referred to twin multiple models architecture, it employs heterogeneous models and online data to create a digital twin, which follows a Globally Asynchronous Locally Synchronous (GALS) model of computation. It facilitates the creation of a scalable digital
twin with different levels of modelling abstraction as well as
giving GALS formalism for execution strategy.